CK-V7-VC7215-G (XILINX)

F2802752
нет данных
 
Комплект, Virtex-7 ПЛИС, IBERT, оценка приемопередатчика GTH, Vivado

Документация
Operating Instructions EN

БрендXILINX НаименованиеCK-V7-VC7215-G Цена заШтука Страна производстваMalaysia СкладFarnell

Комплект, Virtex-7 ПЛИС, IBERT, оценка приемопередатчика GTH, Vivado

The CK-V7-VC7215-G from Xilinx is a Virtex-7 FPGA VC7215 characterization kit. The Virtex™-7 FPGA VC7215 characterization kit provides the hardware environment for characterizing and evaluating 80 GTH (13.1Gbps) transceivers of the on-board Virtex-7 V690T FPGA. The VC7215 allows evaluation of the Integrated Bit Error Ratio Test (IBERT) demonstration using the Vivado design suite. Each GTH quad and its associated reference clock are routed from the FPGA to a connector pad which is designed to interface with a Samtec BullsEye connector. A cable enabled with a BullsEye connector and 10 standard SMAs allows users to connect to a broad range of evaluation platforms from backplanes and optical evaluation boards to high speed test equipment. Each BullsEye connector handles a full GTH quad, four transmit/receive pairs as well as the two independent reference clocks enabling the highest level of flexibility in testing custom applications.
  • Hardware, design tools, IP and pre-verified reference designs
  • Integrated Bit Error Ratio Test (IBERT) reference design
  • System ACE™ SD controller, 693120 logic cell, 3600 DSP slices
  • Expand I/O with 3 FPGA Mezzanine Card (FMC) interface
  • BullsEye connector supporting a full GTH quad with four transmit/receive pairs
  • Twenty Samtec BullsEye connector pads for the GTH transceivers and reference clocks
  • Two pairs of differential MRCC inputs with SMA connectors
  • Power status LEDs and general purpose DIP switches, LEDs, push buttons and test I/O display
  • SuperClock-2 module supporting multiple frequencies, 52920Kb memory
  • Fixed, 200MHz 2.5V LVDS oscillator wired to multi region clock capable (MRCC) inputs clocking

Области применения

Встроенные Конструкции и Разработка

Содержание

VC7215 evaluation board, Full seat Vivado® design: design edition, Samtec Bullseye cable with 10 standard SMAs, Superclock-2 module, Cables, Power supply.

Примечания

Please note this product is Non-Cancellable and Non-Returnable (NCNR)
Архитектура Ядра:
FPGA
Количество Бит:
-
Линейка Продукции:
-
Название Семейства Чипа:
Virtex-7
Номер Ядра Чипа:
XC7VX690T-3FFG1927E
Подархитектура Ядра:
-
Производитель Чипа:
Xilinx
Содержимое Комплекта:
Оценочная плата XC7VX690T-3FFG1927E, кабель Samtec Bullseye, Vivado® Design Suite, модуль Superclock-2
SVHC (Особо Опасные Вещества):
No SVHC (15-Jan-2018)
RoHS статус:
Да
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