SN75LVDS82DGG. (TEXAS INSTRUMENTS)

The SN75LVDS82DGG is a FlatLink™ Receiver contains four serial-in, 7-bit parallel-out shift registers, a 7x clock synthesizer and five low-voltage differential signalling (LVDS) line receivers in a single integrated circuit. These functions allow receipt of synchronous data from a compatible transmitter, such as the SN75LVDS81, over five balanced-pair conductors and expansion to 28-bit of single-ended low-voltage TTL (LVTTL) synchronous data at a lower transfer rate. The SN75LVDS82 can also be used with the SN75LVDS84 or SN75LVDS85 for 21-bit transfers. When receiving, the high-speed LVDS data is received and loaded into registers at the rate of seven times (7x) the LVDS input clock (CLKIN). The data is then unloaded to a 28-bit wide LVTTL parallel bus at the CLKIN rate. A phase-locked loop (PLL) clock synthesizer circuit generates a 7x clock for internal clocking and an output clock for the expanded data. It presents valid data on the falling edge of the output clock (CLKOUT).